High speed digital to analog converters (DAC) have found extensive use in modern wireless transmission chains before the antenna. An 8-bit current-steering DAC, designed for baseband operation in mobile communication terminals, has been implemented in a 0.18 μm technology node from TSMC. The die active area is 0.23 mm2. The circuit is low power and consumes 15 mW from 2.5 V analog supply and 5 mW from a digital 1.5 V digital supply. Additionally, we introduce a DAC calibration method which results in a 2-4 dB of SFDR improvement. Simulations that take into account the measurement setup were also performed in order to determine the factors that lead to the parameter degradation, as well as determining other important parameters as SNR, SINAD and ENOB.

Keywords: Calibration methods, Digital to analog converters, (DAC) High speed , Spurious free dynamic range (SFDR), Signal to noise ration (SNR), Signal to noise and distortion ratio (SINAD), Eeffective number of bits (ENOB)