This paper proposes a new system integrity protection scheme algorithm using transformer under-load tap changer control based on wide area synchrophasor measurements in order to prevent further degradation of the bus voltages in the power system. The impact of various trigger-types on the voltage stability of the power system is investigated. A wide area monitoring, protection, and control “proof-of-concept” testbed is implemented using the real-time digital simulator in combination with industrial-grade equipment comprising of phasor measurement units, phasor data concentrators, programmable logic controller, and communication network switches. The proposed algorithm is tested and validated using an equivalent 10-bus multi-machine test system, and the results obtained verifies its effectiveness.

Keywords: Hardware-in-the-loop, IEC 61850, IEEE C37.118, Phasor measurement unit (PMU), System integrity protection schemes (SIPS), Synchrophasors, Tap-changer control, Voltage stability